Disable "Autocompletion"/"Abbreviation" in Verilog-Mode

Question

When I use the Verilog Mode in spacemacs with evil keybindings, every time I type e.g. wire and press ESC, an automatic dialouge pops up and asks me msb:, lsb: and name (RET to end). This is super annoying, since pressing ESC in the prompt often leads to three blank lines and an open bracket.

Apparently this is defined in the verilog-define-abbrev-table in the verilog-mode.el, but I don't speak lisp, nor do I have deeper knowledge of emacs packages.

Changing the verilog-mode.el file is not possible, since I'm working on a multi user Server without sudo rights.

How can I disable the whole abbreviation-autocompletion stuff in the verilog mode?

Answer 1

Found the Solution: the verilog-mode does fill the "abbrev-table" every time it gets initialized.

I added a hook to my spacemacs-dotfile which clears the table after the mode is initialized:

(defun my-verilog-setup ()
    (clear-abbrev-table verilog-mode-abbrev-table))
(add-hook 'verilog-mode-hook #'my-verilog-setup)

Answer 2

I found an alternative solution, which is to set evil-want-abbrev-expand-on-insert-exit to non-nil. This way, you can still keep the abbrev, either by enabling the mode or via C-x a e or expand-abbrev.

I just customized the variable via SPC h d v (there are other ways of course). In the help of that variable, it says "This variable is read only on load.", which meant a refresh of .spacemacs via SPC f e R didn't set this to the new value. Without knowing another way, a restart of spacemacs did the job.